https://www.spintec.fr/wp-content/uploads/2025/10/Plaquette_Spintec_2026.pdf
Context
With the quick rise in energy consumption of the information and communication technology (ICT) sector expected to reach up to 15% of the total global electricity demand by 2030, giants of the microelectronics industry are actively searching for alternatives to existing technologies. New paradigms of computation beyond von Neumann and technologies beyond-CMOS such as in-memory computing and spintronic-based components seem very promising solutions to answer these challenges. We recently demonstrated in two articles (Nature & Nature Electronics [1,2] the concept and physical foundations for a new type of non- volatile device coined FESO as it is based on ferroelectrics (FE) and spin-orbitronic (SO) phenomena, that have a natural potential to generate an electrically-switchable, highly efficient signal transduction with ultra-low power switching but without resorting to energy-costly mechanisms such as magnetization switching. Such devices can be used advantageously to perform logic operations when combined (cf. fig. 1), similar to the magneto-electric spin-orbit (MESO) logic devices recently proposed by Intel [3] but in a simplified version. This makes ferroelectrics good candidates for ultralow-power post-CMOS logic devices or even for neuromorphic Artificial Intelligence architectures.
[1] Noël, Attané, Vila et al., Nature 580.7804 (2020): 483-486.
[2] Varotto, Attané, Vila et al., Nature Electronics 4, 740–747 (2021)
[3] Manipatruni et al., Nature 565.7737 (2019): 35
Work program & Skills acquired during internship
The Internship (and possible PhD) project aims at exploring the possibilities offered by FESO devices in particular for the development of non-volatile logic functionalities. Building on previous work in our laboratory, the student will contribute to building a library of various individual logic functions exploiting the advantages of FESO, and study how such gates can be efficiently and reliably interconnected. The intern will be involved in the full process from the low-level digital design to larger demonstrator circuit simulations and benchmarking and then to the writing of papers and patents. The intern will also interact regularly with other members of the laboratory working either on the design of electrical circuits and AI systems based on such devices, or on their experimental realization. The project will benefit from the existence of a large collective momentum in our teams towards the development and integration of ferroelectric-based devices, with ongoing ANR and EU projects, and more importantly with a valorization project with the start-up Nellow, based on this technology. The student will be working within the IC design team of SPINTEC and in strong interaction with the Topological Spintronics team and the startup.
- Requested background: Master 2
- Duration: 4-6 months
- Start period: Feb/ March 2026
- Possibility of PhD thesis : YES