https://www.spintec.fr/wp-content/uploads/2025/10/Plaquette_Spintec_2026.pdf
Context
Memristor arrays have emerged as a promising hardware platform for neuromorphic computing [1]. By emulating the adaptive and parallel processing capabilities of synapses, memristors enable energy-efficient, in-memory computation and can support complex learning algorithms directly in hardware. This approach contrasts with traditional von Neumann architectures, which are limited by the energy and latency costs of shuttling data between memory and processing units. In this context, ferroelectric memristors offer distinct advantages. Ferroelectric materials, which exhibit switchable polarization states, provide non-volatile memory, low power operation, and high scalability. Their ability to achieve analog resistance modulation—mimicking synaptic plasticity—makes them particularly well-suited for implementing artificial neural networks with high density, fast operation, and low energy consumption [2,3]. Additionally, ferroelectric devices can enable multi-level data storage and robust retention, further enhancing the efficiency and performance of neuromorphic systems.
At the cross-road between ferroelectricity and quantum physics and materials engineering, such devices allow to modulate very simply their resistance in a non-volatile way using electric fields, thus without resorting to energy-costly mechanisms of other currently studied memristor implementations such as magnetization switching or phase-change. This makes ferroelectric memristors very good candidates for ultralow-power neuromorphic Artificial Intelligence architectures.
Work program & Skills acquired during internship
The Internship (and possible PhD) project aims at exploring the possibilities offered by these features, in particular for the development of FE-based memristor arrays. The student will characterize the basic materials properties and the memristive character of ferroelectric devices and ultimately integrate such devices into memristor arrays. The intern will be involved in the full process from the nanofabrication and electrical measurement of single devices and small memristor arrays to the writing of papers and patents. The intern will also interact regularly with other members of the team working on the design of electrical circuits and AI systems based on such devices. The project will benefit from the existence of a large collective momentum in our teams towards the development and integration of these devices, with ongoing ANR and EU projects, and more importantly with a valorization project with the start-up Nellow, based on this technology.
- Requested background: Master 2
- Duration: 4-6 months
- Start period: Feb/ March 2026
- Possibility of PhD thesis : YES