Microcontroller Design Laboratory
The course “Microcontroller Design, Laboratory” is intended for Master's students with previous knowledge of processor architectures and hardware description languages. The goal is to develop the modular, pipelined HaDes-V microcontroller based on the open RISC-V architecture using SystemVerilog. Students acquire practical skills in design, simulation and synthesis on FPGAs, supported by tools such as Verilator and Vivado. In addition to implementing the basic system, the challenge is to make innovative extensions and improvements. The quality of the implementation, the functionality and the presentation of the work results are assessed. The course promotes the ability to understand, independently implement and further develop complex technical contexts.
Link to the course description: https://online.tugraz.at/tug_online/ee/ui/ca2/app/desktop/#/slc.tm.cp/student/courses/574414?$ctx=lang=en&$scrollTo=toc_overview
This course is part of the VECP (virtual credit exchange programme)
You will be registered as an incoming student at TU Graz in order to receive a Transcript of Records after successfull completion of the course.
Please check in advance with your home university if recognition of the course is possible within your study programme.
To apply, please complete the application form at the 'link to more information' button below.
For a full description of the course, see https://online.tugraz.at/tug_online/ee/ui/ca2/app/desktop/#/slc.tm.cp/student/courses/574414?$ctx=lang=en&$scrollTo=toc_overview