Modeling and Optimization of Embedded Systems
This course introduces the main mathematical models and methods used for the synthesis and verification of embedded hardware and software. It assumes a good knowledge of digital hardware design (with VHDL or Verilog) and of software implementation (with C, C++ or Java) for embedded systems, including a basic knowledge of real-time operating systems. It provides the ability to select and use the best tools and methods for hardware/software co-design, as well as simulation and performance analysis. It provides knowledge about the SystemC language, synchronous languages and dataflow networks.
The dates reported on this page refer to single-course enrolment. Please copy this link into your browser to learn more about the application procedures for Unite! partner university students: https://www.polito.it/en/education/applying-studying-graduating/admissions-and-enrolment/single-courses
For application through the registration link, you will require an official nomination from your university. For virtual mobility programs, refer to the deadlines of your home institution.