High-Level Digital Design
The aim of this Master’s course is for students to understand the implications of hardware/software co-design and the use of configurable integrated systems (SOC), as well as high-level design principles of digital systems based on programmable and configurable components.
The student will use the SystemVerilog hardware description language and the Universal Verification Methodology to carry out the functional verification of complex digital systems. The sustainability implications of the design decisions, as well as techniques to reduce this impact, will also be discussed.
The course also covers the design and implementation, using high-level design languages and techniques, of digital communication and information processing systems, as well as communication interfaces between programmable subsystems (microprocessor/microcontroller) and configurable subsystems (FPGA).
This course requires physical presence. Please copy this link into your browser to learn more about the application procedures for Unite! partner university students.
https://telecos.upc.edu/en/mobility/foreign-students